ACE
ACE IC

Key Features

  • 16 Channels
  • Low Noise
  • Signal Trigger Outputs
  • Large Dynamic Range
  • Ultra High Linearity
  • On-Chip 12-Bit Ultralinear ADC
  • Test Input

  Details


Advanced Charge-conversion Electronics. A multi-channel charge sensitive amplifier/shaper ASIC chip for reading position sensitive solid state detectors

Applications

ACE™ can be used in applications requiring high spatial and energy resolution position sensitive detector arrays from gamma-ray and x-ray astronomy, nuclear physics to medical and industrial imaging. The ACE™ chip can be used with:

  • Multianode PMTs
  • PMTs and Avalanche Photodiodes
  • Silicon strip and pad detectors
  • Channeltrons & Microchannel Plates

Availability

At present, only a very limited number of ACE™ chips in PLCC 84 or CQFP packages are available. Enhancement of the ACE™ chip design and porting it to a new fabrication process are currently under study. NOVA welcomes both technical input and logistical support for this project. A test fixture for the ACE™ chip is available as a loan unit for users who wish to evaluate the chip and possible circuit designs for the support electronics. NOVA is also open to requests for customization of the ACE™ chip design for specific applications

Specifications

Number of Channels:
16
Power Consumption:
208 mW per chip (13 mW/channel)
Full scale signal:
31 pC (700 MeV Si)
Dynamic range (full scale:threshold):
1400:1(not self-triggering over the whole range) 500:1(self-triggering range)
RMS noise:
~ 100 KeV
Gain variation:
< 10%
Threshold variation:
~ 10% rms at 3 MeV
ADC type:
12-bit high-linearity Wilkinson
Dead time per event:
~(6+0.125 N) microseconds
Integral nonlinearity:
~ .1% of full scale
Max. leakage current cancellation:
1 micro-Amp
Temperature coefficient of gain:
< 20 ppm/K
Chip size:
6.1 x 7.3 mm, 84 pads
Offset temperature variation (-20C to 40C)
< 1 channel (after correction)
Cross talk for full scale pulse:
2 channels

Documents

  1.  ACE™ Brochure with Specifications
  2.  ACE™ ASIC Simplified Channel Block Diagram


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